Study Sheet - Chapter 3

Disclaimer: This study sheet covers important terms and concepts that I found in the text. The absence of a specific item in the text from this list does not mean that you are not responsible for knowing it. Also, not valid in Tennessee and for entertainment purposes only.

1. Gates and Boolean algebra

Terms:

device level	collector	base	emitter
gates	inverters	inversion bubbles
bipolar	Metal Oxide Semiconductor (MOS)	Emitter-coupled Logic (ECL)	Transistor-transistor logic (TTL)
Boolean algebra	truth table	complete	duals
positive logic	negative logic

You should understand:

The basics of transistors and how they work
The 5 basic gates (not, nand, nor, and, or) and their truth tables
Manipulating Boolean functions: functions, truth tables, circuits, you should be able to convert from any of these forms to any other
The identities of Boolean algebra (ala Figure 3-6, page 126)
Converting from positive logic to negative, duals
Why the combination of nand/nor gates are complete
The exclusive-or (XOR) function

2. Basic digital circuits

Terms:

integrated circuits (ICs)	Dual inline packages (DIPs)	gate delay
combinational circuit	multiplexor (mux)	demultiplexor (demux)	decoder
comparator	Programmable Logic Arrays (PLAs)
shifter	adder	half adder	full adder
ripple carry adder	Arithmetic Logic Unit (ALU)	clock	clock cycle time

You should understand:

Construction and operation of:
- N-to-1 mux
- 1-to-N demux
- M-to-N decoder
- N bit comparator
- PLA's
Construction and operation of the arimthmetic circuits, including:
- shifter
- half adder
- full adder
- alu

3. Memory

Terms:

latch	flipflop	register
SR latch	clocked SR latch	D latch	D flipflop
edge-triggered	level-triggered
tri-state buffer	active high	active low
RAM	SRAM	DRAM	SDRAM
Fast Page Mode (FPM)	Extended Data Output (EDO)
ROM	PROM	EPROM	EEPROM
flash memory

You should understand:

The construction of memory using gates: 1) starting with SR latch, 2) adding a clock, 3) combining SR inputs into a D latch, 4) changing clock to edge-triggered to create a D flipflop
How memory is organization: the number of address bits required, word size, row/column addressing, tri-state outputs, active high vs. active low
RAM/ROM alphabet soup and the difference between each device, the table on page 154 is a good summary