Homework, schmomework... now, in reverse chronological order!
HW #13 due Wed Mar 6
Lucky 13, the last homework... In class Monday, we will touch each of
these problems. In problems with multiple parts, we will complete the
first one or two. Please come prepared Monday to go to the board and work
these problems out. Thanks... yow, bill
Prob |
Comment |
10-1 |
Decipher CISC machine code |
10-2 |
CISC instruction format |
10-4 |
Addressing modes |
10-5 |
Assembly code |
10-8 |
ASM for CISC instructions |
10-17 |
RISC pipeline processing |
10-18 |
Ditto |
|
|
10-11 |
CSC 580 design problem(s)
Only problems a) - c)... unless you can find where the behavior of
SUBB in problem d) is definitively specified. |
|
HW #12 due Wed Feb 27
Prob |
Comment |
9-1 |
Do all three parts: a, b, and c |
9-4 |
Again three parts: a, b, and c |
9-11 |
Instruction word design |
9-21 |
Handling floating point numbers |
9-23 |
More floating point |
|
|
9-12
9-25 |
CSC 580 design problem(s)
2 problems this time: One on simulating a stack architecture and a
problem about the IEEE representation of floating point numbers. |
- My solution: HW #12
solution
|
HW #11 due Mon Feb 25
Prob |
Comment |
8-2 |
ASM simulation; the problem carries over the
to next page |
8-3 |
ASM to state table |
8-10 |
1 flipflop per state design; use the web
solution to 8-5 as a starting point |
8-31 |
Computer design trivia |
8-34 |
Simulate single-cycle computer instructions |
|
|
8-19 |
CSC 580 design problem
Design the datapath, ASM for control signals and sequencing, and
implement with single flipflop per state methodology |
- My solution: HW #11
solution
|
HW #10 due Wed Feb 11, 2002
Prob |
Comment |
7-3 |
RTL design |
7-4 |
RTL design |
7-6(b) |
RTL design, only part (b) |
7-14 |
RTL design, busses |
7-27 |
Encoding control words |
7-28 |
Decoding control words |
|
HW #9 due Mon Feb 9, 2002
- From Chapter 6 in the text:
Prob |
Comment |
6-1 |
RAM Basics |
6-2 |
More RAM basics |
6-9 |
Still more RAM basics |
6-11 |
ROM building |
6-14 |
Comb logic using ROMs |
6-15 |
Comb logic using PLAs... can you do this in 4
PLA rows? |
6-19 |
Comb logic using PALs |
- My solution: HW #9
solution
|
HW #8 due Wed Feb 4, 2002
- From Chapter 5 in our text:
Prob |
Comment |
5-4 |
Shift register basics |
5-11 |
You just have to figure out one of the four
bits as they are all the same, like Figure 5-7. In fact, you can even
use a Mux like that figure if you like. |
5-18 |
FYI: The T flipflop characteristic table is
found on page 199. |
5-21 |
Counter design with JK flipflops |
5-22 |
Don't worry about the second part, just
modify the counter in Figure 5-12 to count from 0000 to 1001,
repeating... this is easy |
5-28 |
Basic counter design... |
- My solution: HW #8
solution
|
HW #7 due Mon Feb 2, 2002
- From Chapter 4 in our text:
Prob |
Comment |
4-10 |
Flipflop basics |
4-11 |
Analyze flipflop input equations |
4-18 |
JK flipflops |
4-19 |
Sequential design problem with D flipflops; Please do 4-19 using JK flipflops too!
Note: Looks like there's a teeny K-Map error in the book's web
site answer, so don't freak out.
|
4-24 |
Analyze a state diagram |
- My solution: HW #7
solution
|
HW #6 due Wed Jan 23, 2002
- Design your own homework special! Create three homework problems....
one each from:
- Chapter 1: radix conversion, add/subtract, BCD shenanigans
- Chapter 2: boolean minimization, K-Maps, NAND/NOR implementation
- Chapter 3: decoders, muxes, adder/subtractors
You must, of course, provide a solution with your homework problem.
During class, we (the class and/or instructor... oh my!) will
solve (attempt?) at least one of your homework problems. I will post the
best problems from the class on our site.
Go!
|
HW #5 due Mon Jan 21, 2002
- From Chapter 3 in the text...
Prob |
Comment |
3-17 |
Logic design with Decoders |
3-18 |
Logic design with Decoders |
3-28 |
Logic design with Muxes |
3-36 |
Just a fun logic design exercise |
3-39 |
2's complement subtraction |
- My solution: HW #5
solution
|
HW #4 due Wed Jan 16, 2002
- From Chapter 3 in the text...
Prob |
Comment |
3-1 |
Basic logic |
3-2 |
Logic minimization |
3-6 |
Logic minimization |
3-10 |
Logic design |
3-11 |
Logic design |
3-14 |
Muxes |
- My solution: HW
#4
solution
|
Hw #3 due Mon Jan 14, 2002
- From Chapter 2 in our text...
Prob |
Comment |
2-6 |
Boolean algebra |
2-9 |
DeMorgan's Theorem |
2-17 |
K-maps |
2-20 |
K-maps |
2-27 |
Nand/nor gates |
2-32 |
Nand/nor gates |
- My solution: HW #3
solution
|
HW #2 due Wed Jan 9, 2002
- From Chapter 2 in our text...
Prob |
Comment |
2-2 |
Boolean algebra |
2-8 |
DeMorgan's Theorem |
2-10 |
Minterms/maxterms |
2-13 |
Logic gates (use your templates!) |
2-15 |
K-maps |
- My solution: HW #2
solution
|
HW #1 due Mon Jan 7, 2002
- From Chapter 1 in our text...
Prob |
Comment |
1-3 |
Number ranges |
1-7 |
Base conversion |
1-8 |
Add, sub, multiply |
1-12 |
Binary division |
1-13 |
Base conversion |
1-17 |
BCD addition |
1-20 |
BCD numbers |
1-22 |
ASCII code |
1-23 |
Potpourri |
- My solution: HW #1 solution
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